학술논문
FPGA implementation of pulsed noise interference against LFM radar
Document Type
Conference
Source
2017 12th International Conference on Computer Engineering and Systems (ICCES) Computer Engineering and Systems (ICCES), 2017 12th International Conference on. :695-700 Dec, 2017
Subject
Language
Abstract
Linear Frequency Modulation Pulse Compression LFM-PC radars have high processing gain make it difficult to be jammed. Classical noise jammer needs a massive power to affect the LFM radar detection capability which is not practical in modern jammers. This paper introduces a FPGA implementation of prototype noise jammer using pulsed noise jamming techniques to jam LFM with adequate power. Furthermore a complete LFM PC radar model is introduced for jammer evolution purpose. Firstly, the designed jamming technique is simulated in SystemVue environment and secondly Xilinx ISE 14.7 Design tool. Xilinx FPGA board and 4DSP DAC card are used for hardware implantation. The selected FPGA board is Kintex-7 (xc7k325t-2ffg900) and the chosen DAC board is FMC-150. The implementation results for the model in jamming free environment and under the effect of pulsed noise interference agreed with the simulation and earlier model results.