학술논문

Understanding the Excess 1/f Noise in MOSFETs at Cryogenic Temperatures
Document Type
Periodical
Source
IEEE Transactions on Electron Devices IEEE Trans. Electron Devices Electron Devices, IEEE Transactions on. 70(4):2135-2141 Apr, 2023
Subject
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
1/f noise
Temperature
Qubit
MOSFET
Cryogenics
Noise measurement
Logic gates
cryo-CMOS
quantum computing
traps
Language
ISSN
0018-9383
1557-9646
Abstract
Characterization, modeling, and development of cryo-temperature CMOS technologies (cryo-CMOS) have significantly progressed to help overcome the interconnection bottleneck between qubits and the readout interface in quantum computers. Nevertheless, available compact models still fail to predict the deviation of 1/f noise from the expected linear scaling with temperature ( ${T}$ ), referred to as “excess 1/f noise,” observed at cryogenic temperatures. In addition, 1/f noise represents one of the main limiting factors for the decoherence time of qubits. In this article, we extensively characterize low-frequency noise on commercial 28-nm CMOS and on research-grade Ge-channel MOSFETs at temperatures ranging from 370 K down to 4 K. Our investigations exclude electron heating and bulk dielectric defects as possible causes of the excess 1/f noise at low temperatures. We show further evidence for a strong correlation between the excess 1/f noise and the saturation of the subthreshold swing (SS) observed at low temperatures. The most plausible cause of the excess noise is found in band tail states in the channel acting as additional capture/emission centers at cryogenic temperatures.