학술논문

Chemical Mechanical Polishing of Single-Crystalline Diamond Epitaxial Layers for Electronics Applications
Document Type
Periodical
Source
IEEE Transactions on Semiconductor Manufacturing IEEE Trans. Semicond. Manufact. Semiconductor Manufacturing, IEEE Transactions on. 37(2):190-198 May, 2024
Subject
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Diamonds
Surface treatment
Surface roughness
Rough surfaces
Surface morphology
Monitoring
Temperature sensors
Atomic force microscopy
chemical mechanical polishing
chemical vapor deposition
CVD
diamond
epitaxial layers
heterojunction bipolar transistors
polishing machines
process control
surface morphology
surface roughness
Language
ISSN
0894-6507
1558-2345
Abstract
For single crystal diamond (SCD) to gain practical use in technical applications including solid state electronics, thin (< $1 ~\mu \text{m}$ ), doped epitaxial SCD layers with very low ( $4.5 mm^{2}$ area. A subsequent 8-hour oxidative CMP process utilizing potassium permanganate and a novel self-leveling holder design decreased the average surface roughness from 3.83 nm and 1.57 nm to 0.20 nm and 0.16 nm for the two samples, respectively. MRRs were determined by evaluating five circular wear monitor structures in each sample by atomic force microscopy before and after the CMP process. The average MRRs were found to be 38.6 nm/hr and 37.3 nm/hr for the two samples. The purpose of this study is to demonstrate a CMP process suitable for polishing thin SCD epilayers to meet the needs of solid-state electronics applications.