학술논문

Design of very high throughput with low complexity output MIMO decoder
Document Type
Conference
Source
2018 2nd International Conference on Inventive Systems and Control (ICISC) Inventive Systems and Control (ICISC), 2018 2nd International Conference on. :22-25 Jan, 2018
Subject
Aerospace
Bioengineering
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Computing and Processing
Fields, Waves and Electromagnetics
General Topics for Engineers
Photonics and Electrooptics
Power, Energy and Industry Applications
Robotics and Control Systems
Signal Processing and Analysis
MIMO communication
Throughput
Very large scale integration
Complexity theory
Maximum likelihood decoding
Clocks
Decoder
HSDPA
MAGNET
MIMO
Language
Abstract
A low-complexity soft-output decoding algorithm is proposed for MIMO detection. A VLSI architecture is further proposed to support high-throughput MIMO decoding. The simulation and implementation results show that the proposed algorithm and VLSI architecture can approach the performance of the conventional soft-output MIMO decoding algorithms with lower complexity and higher decoding throughput. The proposed algorithm and VLSI architecture would be promising for emerging MIMO applications such as HSDPA, 802.11n, 802.16e and 802.20. It also shows potentials for the MAGNET date rate classes.