학술논문

High density epitaxial unwanted growth and its effect on planarization in FINFET process
Document Type
Conference
Source
2018 29th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC) SEMI Advanced Semiconductor Manufacturing Conference (ASMC), 2018 29th Annual. :159-162 Apr, 2018
Subject
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Engineering Profession
Power, Energy and Industry Applications
Metrology
Logic gates
Silicon germanium
Epitaxial growth
Silicon
Silicon compounds
Monitoring
Unwanted growth
high density SiGe defects
incomplete polish
in-situ metrology
high throughout
Language
ISSN
2376-6697
Abstract
While epitaxial growth enhances carrier mobility of PMOS devices, it introduces an unwanted growth (UG) defect which is an artifact of Silicon Germanium (SiGe) component that becomes a yield detractor in high volume manufacturing. This paper describes the effect of high density UG defect on downstream CMP processes, detection methods using both defect scan and in-situ metrology. Use of high resolution defect scans and high throughput inline metrology was the key to detection of non-conforming material.