부산대학교 도서관

Nowadays, high-performance multi-channel time measurement systems continuously demand a reduction in the acquisition time, in order to satisfy the requirement in terms of data-rate of applications like Time-of-Flight Positron Emission Tomography (TOF-PET), Time-Correlated Single Photon Counting (TCSPC) and 3D time-imaging, just to cite the most common ones. In those applications time-tagging approach is the most useful solution; thus, timestamps are acquired by dedicated electronics and sent to the computer (PC) to be elaborated. In this sense, a high-transfer rate is mandatory.To be compliant with fast-prototyping and high-flexibility requirements of the research field, these systems are usually implemented in programmable logic devices, i.e. Field Programmable Gate Array (FPGA) and System-on-Chip (SoC), using high-speed protocols (e.g.; USB 3.0, PCI, Ethernet) as PC read-out. Concerning this work, timestamps which are measured by a 16-channel, femtoseconds resolution, picoseconds precision, FPGA-based Time-to-Digital-Converter (TDC) are organized in compressed packets, by means of a proper Time-Tagger Module, and sent to the PC using USB 3.0. The USB interface is driven to a dedicated integrated circuit (Cypress FX3) that is properly managed by the FPGA. From a firmware point of view, an IP-Core which make the link between TDC and FX3 effective has been developed; also, from a software point of view, a proper software has been developed.The proposed system has been implemented on a board made by Avnet, the Kintex 7 Mini Module that host a 28-nm 7-Series Xilinx Kintek-7 (xc7k325tffg676-1) FPGA.The overall result is to have a time-measurement system based on a 64-bit wide timestamp TDC working with an LSB of 36.6 fs, that means an FSR up to several days, which transmits measures to the PC at 370 MB/s, i.e. a transfer rate of tens of Msps.