부산대학교 도서관

High performance computing (HPC) is essential to applications like big data analysis, artificial intelligence, and cloud computing. Products like autonomous vehicles, edge computing server and data center require high computing speeds, high memory accessing bandwidth and capacity, and high input/output (I/O) bandwidth. Interposer technology is successfully adopted for heterogeneous and chiplet integration because of its advantages in electrical performance, warpage control, yield and reliability. Organic interposer (CoWoS-R) technology is one of the most promising new integration interposer platforms, providing low RC interconnect with good signal isolation and design scalability. The CoWoS-R technology is currently in production with high assembly yields.We build a large package (97x95mm 2 ) with 4 large SoC and 12 HBMs on a 5.5X CoWoS-R interposer. The new HBM4 JEDEC standard doubles the data I/O counts from 1K to 2K to achieve a high data bandwidth. RDL lines provide abundant escape density for high density applications. The line density in this large package is increased to higher than 1100 lines/mm for this change. Such a high die-to-die interconnect density is also capable of supporting 64x lanes with the 32Gbps UCle standard. Multiple high density decoupling capacitors are integrated to suppress the power domain noise and enhance the signal integrity. The electrical performance and package reliability of this large size package will be presented in this paper.