부산대학교 도서관

Active gate drivers lend themselves well to reducing over- and undervoltages during the commutations of hard switched power transistors, as well as to damping resonances. However, their control strategy is a major challenge, as it should account for variations of operating condition, parameter spread, and nonlinearities of the driven transistor. This article proposes an effective control method to reduce overshoots and undershoots in a power transistor driven by an active gate driver. The modulation pattern is modified on-the-fly and none a priori characterization is required. The presented method modifies the timing parameter to attain almost zero over- and undervoltages with the lowest power losses. This is achieved by combining a low-complexity active gate driver with the measurements of peak values of the drain–source voltage. The technique was experimentally assessed for a 48–12 V dc–dc converter, and resulted in better switching performance than standard solutions and open-loop control.