학술논문
Development of a Three-Level Converter for Emulation and Controlled Generation of Faults in Single-Phase Electrical Grids
Document Type
Conference
Source
2023 IEEE International Autumn Meeting on Power, Electronics and Computing (ROPEC) Power, Electronics and Computing (ROPEC), 2023 IEEE International Autumn Meeting on. 7:1-6 Oct, 2023
Subject
Language
ISSN
2573-0770
Abstract
The work describes the development of a three-level converter based on a switched source capable of generating typical fault signals present in the power grid. The process involves designing, simulating, and implementing the converter using an STM32 NUCLEO-F746ZG DSP board and an H-MOSFET bridge electronic board acting as an inverter. The control circuit is implemented through Simulink, emulating various typical faults found in power grids. A VHDL-based data acquisition system using a GENESYS2 FPGA has also been developed to analyze and record the emulated fault signals. The generated faults include sag, swell, flicker, harmonics, and variations according to the IEEE 1159-2009 standard. The obtained results enable the evaluation of the impact of these signals on the converter and the electrical system, which is crucial for enhancing the quality and stability of the power supply and designing more reliable systems.