학술논문

Earthquake — A NoC-based optimized differential cache-collision attack for MPSoCs
Document Type
Conference
Source
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE) Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018. :648-653 Mar, 2018
Subject
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Computing and Processing
Timing
Glass
Encryption
Earthquakes
System-on-chip
Computer architecture
Network-on-Chip
Security NoC
Timing Attack
Timing Side-channel Attack
Language
ISSN
1558-1101
Abstract
Multi-Processor Systems-on-Chips (MPSoCs) are a platform for a wide variety of applications and use-cases. The high on-chip connectivity, the programming flexibility, and the reuse of IPs, however, also introduce security concerns. Problems arise when applications with different trust and protection levels share resources of the MPSoC, such as processing units, cache memories and the Network-on-Chip (NoC) communication structure. If a program gets compromised, an adversary can observe the use of these resources and infer (potentially secret) information from other applications. In this work, we explore the cache-based attack by Bogdanov et al., which infers the cache activity of a target program through timing measurements and exploits collisions that occur when the same cache location is accessed for different program inputs. We implement this differential cache-collision attack on the MPSoC Glass and introduce an optimized variant of it, the Earthquake Attack, which leverages the NoC-based communication to increase attack efficiency. Our results show that Earthquake performs well under different cache line and MPSoC configurations, illustrating that cache-collision attacks are considerable threats on MPSoCs.