학술논문

MICA: a mapped interconnection-cached architecture
Document Type
Conference
Source
Proceedings Frontiers '95. The Fifth Symposium on the Frontiers of Massively Parallel Computation Massively parallel computation Frontiers of Massively Parallel Computation, 1995. Proceedings. Frontiers '95., Fifth Symposium on the. :80-89 1995
Subject
Computing and Processing
Routing
Parallel architectures
Hypercubes
National electric code
Switches
Parallel programming
Technological innovation
Interference
Topology
Concurrent computing
Language
Abstract
MICA (Mapped Interconnection-Cached Architecture) is a novel architecture combining large reconfigurable networks and small, fast on-line routing, crossbar switches. It offers a good match for parallel applications exhibiting switching locality. Switching locality means that the need to "switch" or route the information to or from each PE is limited to a small set of sources or destinations. A parallel programming paradigm to attempt and minimize the movement of information by reconfiguring the relative proximity of the PEs is introduced. We aim to complete most communication requests with only two levels of routing decisions among a small set of channels. Multi-hop routing is not used as often, resulting in better performance.ETX