학술논문
Interfacial Layer Engineering in Sub-5-nm HZO: Enabling Low-Temperature Process, Low-Voltage Operation, and High Robustness
Document Type
Periodical
Source
IEEE Transactions on Electron Devices IEEE Trans. Electron Devices Electron Devices, IEEE Transactions on. 70(6):2962-2969 Jun, 2023
Subject
Language
ISSN
0018-9383
1557-9646
1557-9646
Abstract
For low-voltage reliable operation of ferroelectric devices, the scaling of Hf $_{{1}-{x}}$ ZrxO2 (HZO) thickness ( ${t}_{\text {HZO}}$ ) is important. Despite the importance of scaling, ferroelectricity degradation and increased process thermal budget hinder progress. In this work, we propose the use of an interfacial layer (IL) to mitigate these scaling issues and validate its effectiveness in thin ${t}_{\text {HZO}}$ . Our findings demonstrate that IL can activate ferroelectricity below the critical temperature of ferroelectric HZO. Moreover, we report $2\times $ polarization improvement, reduced operation voltage from 1.5 to 1.2 V, and substantially improved endurance with $>$ 10 years of reliability, all based on experimental results. We believe this systematic work offers a simple yet efficient route toward HZO scaling in ferroelectric devices.