학술논문

A 342mW mobile application processor with full-HD multi-standard video codec
Document Type
Conference
Source
2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers Solid-State Circuits Conference - Digest of Technical Papers, 2009. ISSCC 2009. IEEE International. :158-159,159a Feb, 2009
Subject
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Video codecs
Energy consumption
Circuits
Cellular phones
High definition video
Bandwidth
Multicore processing
Decoding
Intellectual property
Visualization
Language
ISSN
0193-6530
2376-8606
Abstract
Today's cellular phones must support full high-definition (full-HD) video in multiple video formats, such as H.264 and MPEG-2/-4, with low power consumption. Full-HD video processing requires six times the data bandwidth and is more computationally intensive than conventional standard-definition (SD) video. The trade-off between flexibility, performance and power consumption is a key focus of video-codec design. Homogeneous multi-core processors are power-consuming and achieving high-throughput is difficult [1]. While dedicated circuits can minimize power consumption, the dedicated decoders and encoders in previous reports [2, 3] have difficulty performing all of the media processing that is indispensable for a modern cellular phone [4]. In this paper, we have integrated a mobile application processor featuring a two-stage-processing video codec, tile-based address-translation circuits, and several audio/visual intellectual property (IP) modules.