학술논문
A 26.4mW, 18.6MS/s Image Reconstruction Processor for IoT Compressive Sensing
Document Type
Conference
Source
2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) VLSI Technology and Circuits (VLSI Technology and Circuits), 2023 IEEE Symposium on. :1-2 Jun, 2023
Subject
Language
ISSN
2158-9682
Abstract
This work presents the first energy-efficient, real-time image reconstruction processor for IoT compressive sensing. The chip implemented in 40 nm CMOS dissipates only 26.4 mW with a throughput of 60 fps for VGA images, delivering $5.4 \times 10^{6} \times$ and $6.5 \times 10^{4} \times$ higher energy and area efficiency than a high-end CPU. It supports an equivalent throughput of 18.6 MS/s for 2 D images, achieving $27.2 \times$ and $19.5 \times$ improvements in energy and area efficiency than state-of-the-art 1D compressive sensing reconstruction processors.