부산대학교 도서관

The rising prominence of RISC-V, despite its inherent lack of multithreading support, has sparked research initiatives to design and implement multithreaded RISC-V processors. In this paper, we present a novel multithreaded RISC-V processor explicitly tailored for real-time systems. Our design allows for dynamic thread manipulation- encompassing creation, execution, halting, deletion, and more- to emulate the behavior of tasks in a real-time operating system’s task queue. We introduce specialized instructions to RISC-V to facilitate these thread control operations. The proposed processor is equipped with eight logical cores, enabling simultaneous execution of up to eight threads. A context cache is integrated to efficiently manage context switches between threads, achieving context switches in four clocks. This feature empowers the processor to concurrently run a greater number of threads than its core count. Simulation results underscore the benefits of our design: multithreaded execution yields an instruction per cycle (IPC) rate that surpasses single-threaded execution by up to 5.5 times. Furthermore, our priority system ensures preferential execution of high-priority threads over their lower-priority counterparts. Consequently, we have realized a multithreaded RISC-V processor capable of prioritized execution across eight threads and concurrent execution beyond its core count.