학술논문
A 43-nW 10-bit 1-kS/s SAR ADC in 180nm CMOS for biomedical applications
Document Type
Conference
Author
Source
2015 IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia) Microelectronics and Electronics (PrimeAsia), 2015 IEEE Asia Pacific Conference on Postgraduate Research in. :21-25 Nov, 2015
Subject
Language
ISSN
2159-2160
Abstract
This work presents an ultra-low power 10-bit, 1-KS/s successive approximation register (SAR) analog-to-digital converter (ADC) for biomedical applications. To achieve the nano-watt range power consumption, an ultra-low-power design technique has been utilized, inflicting maximum simplicity on the ADC architecture and low transistor count. ADC was designed in 180nm CMOS technology with a 1-V power supply and a 1-kS/s sampling rate for monitoring bio potential signals. The ADC achieves a signal-to-noise plus distortion ratio of 57.16 dB and consumes 43 nW, resulting in a figure of merit of 73 fJ/conversion-step.