학술논문

A Novel Hybrid-Channel Gate-All-Around Nanosheet Transistor for Leakage Control and Subthreshold Slope Reduction
Document Type
Conference
Source
2024 Conference of Science and Technology for Integrated Circuits (CSTIC) Science and Technology for Integrated Circuits (CSTIC), 2024 Conference of. :1-3 Mar, 2024
Subject
Bioengineering
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Engineering Profession
Photonics and Electrooptics
Integrated circuits
PIN photodiodes
Photonic band gap
Gallium arsenide
Logic gates
CMOS process
Transistors
Language
Abstract
We report a novel Hybrid-channel Gate-AlI-Around (GAA) nanosheet field-effect transistor (NSFET) for the first time. By introducing a reverse biased p-i-n sub-channel, the proposed Hybrid-channel NSFET is able to combine the advantages of GAA MOS channel and sub-TFET channel, achieving superior sub-channel leakage control and possible sub-60m V /dec subthreshold slope (SS), thus significantly alleviating the critical issues of parasitic channel leakage and degraded SS in conventional NSFETs. Simulated Hybrid-channel NSFET exhibits comparable leakage current level with NSFET based on Full BDI scheme, yet with excellent immunity to process variations at the same time. A steep minimum SS of 11.38 mV/dec and average SS of 36.67 mV/dec for 6 decades have also been obtained through bandgap engineering of the sub-TFET channel.