학술논문

Designing a Sub-20V Breakdown Voltage SPAD With Standard CMOS Technology and n/p-well Structure
Document Type
Periodical
Author
Source
IEEE Photonics Journal IEEE Photonics J. Photonics Journal, IEEE. 16(2):1-8 Apr, 2024
Subject
Engineered Materials, Dielectrics and Plasmas
Photonics and Electrooptics
Single-photon avalanche diodes
Electric breakdown
Electric fields
Breakdown voltage
Timing
Photonics
CMOS technology
Single photon avalanche diode
photo detector
CMOS sensor
LiDAR
Language
ISSN
1943-0655
1943-0647
Abstract
We have proposed a structural design for a single photon avalanche diode with a low breakdown voltage. This diode is fabricated using Taiwan Semiconductor Manufacturing Company (TSMC) 0.18 μm HV CMOS technology, and it can maintain a high operating excess voltage in an n-on-p design without requiring any additional customized well layers. The n-on-p type device is particularly advantageous for a 3D-stacked backside illuminated structure and offers excellent photon detection capabilities at longer wavelengths. By incorporating a high doping concentration PDD well layer, we can significantly increase the excess bias, resulting in enhanced photon detection probability in the near-infrared wavelength range, all while maintaining a lower voltage due to a reduction in breakdown voltage. This design also leads to power consumption savings. As a result, our designed device is well-suited for consumer applications such as 3D image rendering and LiDAR technology.