학술논문

An effective ESD program management based on S20.20 plus ESD capability/risk analysis
Document Type
Conference
Source
Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2014 Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD), 2014 36th. :1-7 Sep, 2014
Subject
Components, Circuits, Devices and Systems
Computing and Processing
Engineering Profession
Fields, Waves and Electromagnetics
General Topics for Engineers
Power, Energy and Industry Applications
Robotics and Control Systems
Signal Processing and Analysis
Electrostatic discharges
Discharges (electric)
Process control
Sawing
Wires
Materials
Footwear
Language
ISSN
0739-5159
Abstract
The semiconductor back end manufacturing process starts from the wafer dicing process and finishes with the final tested product with many processes in between where the ESD protection requirement may vary to a great extent. To have an effective ESD control of the different process steps, an ESD protection concept based on S20.20 alone is not sufficient. The control strategy additionally should be based on ESD process capability/risk analysis. The paper provides a macro overview on how an effective ESD program management is established in a semiconductor manufacturing facility.