학술논문
4.8 A 28nm x86 APU optimized for power and area efficiency
Document Type
Conference
Author
Source
2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers Solid- State Circuits Conference - (ISSCC), 2015 IEEE International. :1-3 Feb, 2015
Subject
Language
ISSN
0193-6530
2376-8606
2376-8606
Abstract
Carrizo (CZ, Fig. 4.8.7) is AMD's next-generation mobile performance accelerated processing unit (APU), which includes four Excavator (XV) processor cores and eight Radeon™ graphics core next (GCN) cores, implemented in a 28nm HKMG planar dual-oxide FET technology featuring 3 V t s of thin-oxide devices and 12 layers of Cu-based metallization. This 28nm technology is a density-focused version of the 28nm technology used by Steamroller (SR) [1] featuring eight 1× metals for dense routing, one 2× and one 4× for low-RC routing and two 16x metals for power distribution.