학술논문

A pipelining method for high speed VLSI wave digital filters
Document Type
Conference
Source
Proceedings of 1994 37th Midwest Symposium on Circuits and Systems Midwest symposium on circuits and systems Circuits and Systems, 1994., Proceedings of the 37th Midwest Symposium on. 2:1091-1094 vol.2 1994
Subject
Components, Circuits, Devices and Systems
Communication, Networking and Broadcast Technologies
Engineered Materials, Dielectrics and Plasmas
Pipeline processing
Very large scale integration
Digital filters
IIR filters
Lattices
Arithmetic
Adaptive arrays
Digital systems
Dynamic range
Signal processing
Language
Abstract
Wave Digital Filters are known to be superior in many respects to other IIR filter structures. The Lattice Wave Digital Filter, investigated here, is a highly efficient, modular structure that is suitable for VLSI implementation. Previous speed-critical design approaches have aimed at minimising the evaluation time of the single twoport adaptor, which is the repeated unit of the filter. However, more efficient designs can be obtained by concentrating on the pipelining techniques of the complete filter, and this is the approach applied here. This paper presents the derivation of a minimally pipelined Lattice Wave Digital Filter which leads to the structure with the highest sample rate given a specific coefficient wordlength and bit-level implementation technique.