학술논문

The Influence of Pin Position on CDM Peak Current of Chips Based on Large-Sized CoWoS Package
Document Type
Conference
Source
2024 Conference of Science and Technology for Integrated Circuits (CSTIC) Science and Technology for Integrated Circuits (CSTIC), 2024 Conference of. :1-3 Mar, 2024
Subject
Bioengineering
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Engineering Profession
Photonics and Electrooptics
Integrated circuits
Power supplies
Electricity
Layout
Voltage
Discharges (electric)
Pins
Language
Abstract
This article mainly investigates the effect of pin position on the charged device model(CDM) peak current in CoWoS packaged chips. The results indicate that the peak current of CDM decreases significantly as the distance from the center increases for pins of the same type. The Power/Ground pin is mainly caused by a decrease in the quantity of electricity, while the IO pin is caused by an increase in the rise time of the first wave peak of the discharge.