부산대학교 도서관

A custom monolithic circuit has been developed for the Time Expansion Chamber (TEC) of the PHENIX detector at the Relativistic Heavy Ion Collider (RHIC). This detector identifies particles by sampling their ionization energy loss (dE/dx) over a 3 cm drift space and by detecting associated transition radiation (TR) photons. To be simultaneously sensitive to dE/dx and TR events requires a dual-gain system. We have developed a compact solution featuring an octal preamplifier/shaper (P/S) IC with a split gain stage. The circuit, fabricated in 1.2 /spl mu/m CMOS, incorporates a trans-impedance preamplifier and a 70 ns unipolar CR-RC shaper with ion tail compensation and active DC offset cancellation. Digitally selectable gain, peaking time, and tail cancellation as well as channel-by-channel charge injection and disable can be configured in the system via a 3-wire interface. The 3.5/spl times/5 mm/sup 2/ die is packaged in a fine-pitch 64-pin PQFP. Equivalent input noise is less than 1500 rms electrons at a power dissipation of 30 mW per channel. On a sample of 2400 chips, the DC offset was 2.3/spl plusmn/3 mV rms without trimming. A chamber-mounted board houses four P/S chips, on-board calibration circuit, and 64 analog differential line drivers which convey the shaped pulses 7 m to crate-mounted flash ADCs. An RS-422 link provides digital configuration downloading and read back, and supplies the calibration strobe. The 9.7"/spl times/3.75" board dissipates 8.5 Watts.