부산대학교 도서관

The growing demand for I/O bandwidth in high-performance applications, such as datacenter switches and HPC nodes, drives the need for on-package integration of Optical I/O modules with the host CMOS ICs [1]. Silicon Photonics (SiPh) is a prime technology platform to realize multi-Tb/s hybrid CMOS-SiPh modules for $1\mathrm {m}-500\mathrm {m} +$ optical interconnect distances [2]. Such Optical I/O modules require interfaces for dense, high-speed electrical I/O and low-noise power and ground delivery, which can be enabled by the integration of through-silicon vias (TSV) into the SiPh platform. Here, we describe challenges and results for $10 \mu \mathrm{m} \times 100 \mu \mathrm {m}$ TSV-middle integration into a 300mm SiPh interposer platform. TSVs with low RF loss up to 50GHz are demonstrated along with low SiPh waveguide losses and high-performance Ge photodetectors.