학술논문
2.5 Gbits/sec telecommunications gate array
Document Type
Conference
Author
Source
Proceedings., 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors Computer Design: VLSI in Computers and Processors, 1990. ICCD '90. Proceedings, 1990 IEEE International Conference on. :259-262 1990
Subject
Language
Abstract
Describes a gate array designed specifically for fiber-optic telecom or datacom mux/demux applications at up to 2.5 Gb/s. The device is fabricated in GaAs technology and uses standard ECL power forms and I/O levels. This gate array can convert a 2.5-Gb/s serial data stream to or from a 16-bit-wide parallel data at 155 Mb/s. Process technology, chip architecture, circuit design, and performance are outlined.ETX