학술논문

A Study on Back Grinding Tape for Ultra-thin Chip Fabrication
Document Type
Conference
Source
2018 20th International Conference on Electronic Materials and Packaging (EMAP) Electronic Materials and Packaging (EMAP), 2018 20th International Conference on. :1-4 Dec, 2018
Subject
Components, Circuits, Devices and Systems
General Topics for Engineers
Manufacturing processes
Stacking
Process control
Packaging
Mobile handsets
Filling
Chip scale packaging
Language
Abstract
Accompanying the rapid progress of the digital network information and spread of mobile devices, there is strong demand for the high functionality and miniaturization of devices. Thus, the chip ultra-thinning and stacking technologies are important to achieve it. DBG (dicing before grinding) process is popular thinning process for ultra-thin chip. But, dicing wafers always causes chip side and surface chipping. This defect on chip faces become source of chip-cracks. SDBG (stealth dicing before grinding) process is a novel process known as SD (stealth dicing) offers a potential defect-free singulation process. But, SDBG process often causes chip-cracks because of very narrow kerf by SD. Chip-crack is caused by collision of chips by chip-shift in the manufacturing process. Therefore, BG (back grinding) tape for SDBG process required for controlling chip-shift. Especially, key process for controlling chip-shift is back grinding process. In order to control the chip-shift, 1st key point is Young’s modulus of base film. Elongation of BG tape in laminating process causes chip-shift, so we have optimized base film which can be control chip-shift. The 2nd key point is elastic modulus and thicness of adhesive layer. We have studied the elastic modulus and thickness of adhesive layer which can fill to wafer pattern and control chip-shift.