부산대학교 도서관

Adiabatic quantum-flux-parametron (AQFP) is an ac-biased logic family noted for its extremely low switching energy of around 1.4 zJ per Josephson junction (JJ) at a clock frequency of 5 GHz. Therefore, the AQFP logic family provides a high-speed, ultra-low-energy alternative to CMOS technology. However, quantised flux, such as vortices, trapped in the superconductor film can adversely affect circuit operation. A conventional solution to vortices is the introduction of low potential holes, also known as moats, within the film. Although basic guidelines have been introduced from published circuits, there is currently no standard method for designing and analysing moats for AQFP circuits. The double gate process (DGP) is a double-active-layered niobium fabrication process that allows for more compact circuits. But the effects of quantised flux for AQFP circuits on both active layers are currently unknown. We use 3D parameter extraction software tools to analyse the effect of various moat structures for AQFP logic cells for DGP and improve layout and moat placement designs.