학술논문
A 39,000 Subexposures/s CMOS Image Sensor with Dual-tap Coded-exposure Data-memory Pixel for Adaptive Single-shot Computational Imaging
Document Type
Conference
Author
Source
2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) VLSI Technology and Circuits (VLSI Technology and Circuits), 2022 IEEE Symposium on. :78-79 Jun, 2022
Subject
Language
ISSN
2158-9682
Abstract
A dual-tap coded-exposure-pixel (CEP) image sensor is presented and demonstrated in several computational imaging applications. The NMOS-only data-memory pixel (DMP) reduces transistor count in CEP yielding 39,000 subexposures/s at 320x320 sensor resolution with 7 µm pitch. The outputs of a frame-rate 12-bit ADC1 and a 1-bit subexposure-rate ADC2 are adaptively combined to boost the native dynamic range of coded-imaging modalities by over 57dB, demonstrating over 101dB dynamic range in intensity imaging. The CEP camera combined with machine learnt projection patterns enables single-shot structured-light 3D imaging at native resolution and video rate.