학술논문
Low Noise Dual-Mode Sensor Analog Front-End for Capacitive and Resistive Microsensors
Document Type
Conference
Author
Source
2020 International Conference on Electronics, Information, and Communication (ICEIC) Electronics, Information, and Communication (ICEIC), 2020 International Conference on. :1-3 Jan, 2020
Subject
Language
Abstract
This paper presents a low noise dual-mode sensor analog front-end (AFE) for capacitive and resistive microsensors. The proposed circuit features a versatile advantage of driving both capacitive and resistive microsensors with low noise, low power, and high resolution. The capacitive sensor analog front-end (C-AFE) implements a correlated double sampling (CDS) technique to reduce flicker noise and DC offset. An automatic offset cancellation loop (AOCL) is implemented to automatically calibrate the residual sub-fF offset. The resistive sensor analog front-end (R-AFE) adopts 3-opamp instrumentation amplifier (IA) topology with a chopper stabilization technique which can effectively reduce flicker noise and DC offset. To reduce the output ripple caused by chopper up-modulation, a ripple reduction loop (RRL) is employed. The proposed dual-mode sensor AFE is implemented in a 180 nm 1P6M CMOS technology and the power consumption is 0.93 mW with 3.3 V supply. The simulated input-referred capacitance noise of C-AFE are $\mathbf{1.2\ aF}_{\mathbf{rms}}$ in a 200 Hz bandwidth. The R-AFE achieves $\mathbf{0.37}\ \mu \mathbf{V}_{\mathbf{rms}}$ input-referred noise in a 200 Hz bandwidth.