학술논문

Application-oriented wear-leveling optimization of 3D TSV-integrated storage class memory-based solid state drives
Document Type
Conference
Source
2018 International Conference on Electronics Packaging and iMAPS All Asia Conference (ICEP-IAAC) Electronics Packaging and iMAPS All Asia Conference (ICEP-IAAC), 2018 International Conference on. :27-32 Apr, 2018
Subject
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Photonics and Electrooptics
Power, Energy and Industry Applications
Signal Processing and Analysis
Cows
Through-silicon vias
Energy consumption
Random access memory
Lead
Memory management
Solid-state drive (SSD)
Storage class memory (SCM)
Through-silicon via (TSV)
Language
Abstract
Storage class memories (SCMs) are expected as next generation non-volatile memory due to their high performance, high scalability and low energy consumption [1]. Since the SCM endurance is limited, wear-leveling is required. Wear-leveling is the function on SSD controller to distribute overwrite count each memory cell and to avoid excessive overwrite to particular cells. However, frequent wear-leveling greatly affects the performance of SSDs. In this paper, the frequency of wear-leveling in SCM-based SSD is optimized for real world application. By optimizing frequency of wear-levering for each application, SCM-based SSD performance improves by 38.6% and energy consumption decreases by 18.0%, respectively. Moreover, energy consumption of SCM-based SSD is reduced by up to 82.8% by introducing through-silicon via (TSV) instead of bonding-wire.