부산대학교 도서관

We report on the development of a VME slave interface for the CLEO III detector implemented in an ALTERA EPM7256 CPLD. This includes the first implementation of the chained block transfer protocol (CELT) and multi-cast cycles (MCST) as defined by the VME-P task group of VIPA. Within VME64 there is no operation that guarantees efficient readout of large blocks of data that are sparsely distributed among a series of slave modules in a VME crate. This has led the VME-P task group of VIPA to specify protocols that enable a master to address many slaves at a single address. Which slave is to drive the data bus is determined by a token passing mechanism that uses the *IACKOUT, *IACKIN daisy chain. This protocol requires no special features from the master besides conformance to VME64. Non-standard features are restricted to the VME slave interface. The CLEO III detector comprises /spl sim/400,000 electronic channels that have to be digitized, sparsified, and stored within 20 /spl mu/s in order to incur less than 2% dead time at an anticipated trigger rate of 1000 Hz. 95% of these channels are accounted for by only two detector subsystems, the silicon microstrip detector (125,000 channels), and the ring imaging Cerenkov detector (RICH) (230,400 channels). The occupancy after sparsification in either of these two detector subsystems is expected to be less than 1%, resulting in event fragments on the order of 10 KBytes each, spread over 4, and 8 VME crates, respectively. We developed a chip set that sparsifies, tags, and stores the incoming digital data on the data boards, and includes a VME slave interface that implements MCST and CELT protocols. In this paper, we briefly describe this chip set and then discuss the VME slave interface in detail.