학술논문

Software-Based Self-Test Techniques for Dual-Issue Embedded Processors
Document Type
Periodical
Source
IEEE Transactions on Emerging Topics in Computing IEEE Trans. Emerg. Topics Comput. Emerging Topics in Computing, IEEE Transactions on. 8(2):464-477 Jun, 2020
Subject
Computing and Processing
Program processors
Pipelines
Computer architecture
Built-in self-test
Registers
Automotive engineering
Microprocessors testing
software-based self-test
functional safety
software test libraries
Language
ISSN
2168-6750
2376-4562
Abstract
Nowadays, Self-Test strategies for testing embedded processors are increasingly diffused, especially for safety critical systems. Test programs can be effectively used for this purpose. This paper describes a set of systematic self-test techniques for in-order dual-issue embedded processors. The paper shows how to produce test programs suitable for the detection of faults in five classes of sub-modules: duplicated computational modules; multi-port register file; duplicated pipeline registers and feed-forward paths; pipeline interlocking logic; and pre-fetch buffer. While some techniques extend single-issue test programs, new techniques are also shown; results are illustrated for a couple of 32-bit in-order dual-issue processors included in automotive Systems-on-Chip manufactured by STMicroelectronics.