학술논문

Fuzzing+Hardware Performance Counters-Based Detection of Algorithm Subversion Attacks on Postquantum Signature Schemes
Document Type
Periodical
Source
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on. 42(2):384-396 Feb, 2023
Subject
Components, Circuits, Devices and Systems
Computing and Processing
Cryptography
Software
Codes
Monitoring
Program processors
Software algorithms
Hardware
Hardware performance counters (HPCs)
integrity verification
postquantum cryptography (PQC)
tamper detection
Language
ISSN
0278-0070
1937-4151
Abstract
NIST is standardizing postquantum cryptography (PQC) algorithms that are resilient to the computational capability of quantum computers. Past works show malicious subversion with cryptographic software algorithm subversion attacks (ASAs) that weaken the implementations. We show that PQC digital signature (DS) codes can be subverted in line with previously reported flawed implementations (2008) (Bernstein et al., 2016) that generate verifiable, but less-secure signatures, demonstrating the risk of such attacks. Since all processors have built-in hardware performance counters (HPCs), there exists a body of work proposing a low-cost machine learning (ML)-based integrity checking of software using HPC fingerprints. However, such HPC-based approaches may not detect subversion of PQC codes. A miniscule percentage of qualitative inputs when applied to the PQC codes improves this accuracy to 98%. We propose gray-box fuzzing as a preprocessing step to obtain inputs to aid the proposed HPC-based method.