학술논문
Variation Aware Optimization vs Classical Margin Optimization of Superconducting Electronics
Document Type
Periodical
Author
Source
IEEE Transactions on Applied Superconductivity IEEE Trans. Appl. Supercond. Applied Superconductivity, IEEE Transactions on. 33(5):1-4 Aug, 2023
Subject
Language
ISSN
1051-8223
1558-2515
2378-7074
1558-2515
2378-7074
Abstract
We have developed a Superconducting Electronics Circuit Design Optimizer in conjunction with a Statistical Process Variation Josephson Junction Model and formal method of Logic Verification as a means to optimize circuits and mitigate their susceptibility to factors of yield loss. In this paper, we will contrast the Yield improvement provided by direct yield optimization against classical methods of margin centering.