학술논문
Mechanism of Electron Trapping and Characteristics of Traps in $\hbox{HfO}_{2}$ Gate Stacks
Document Type
Periodical
Source
IEEE Transactions on Device and Materials Reliability IEEE Trans. Device Mater. Relib. Device and Materials Reliability, IEEE Transactions on. 7(1):138-145 Mar, 2007
Subject
Language
ISSN
1530-4388
1558-2574
1558-2574
Abstract
Electron trapping in high-$\kappa$ gate dielectrics under constant voltage stress is investigated. It is suggested that the electron trapping occurs through a two-step process: resonant tunneling of the injected electron into the preexisting defects (fast trapping) and thermally activated migration of trapped electrons to unoccupied traps (slow trapping). Characteristics of the electron traps extracted based on the proposed model are in good agreement with the calculated properties of the negatively charged oxygen vacancies. The model successfully describes low-temperature threshold voltage instability in NMOS transistors with $\hbox{HfO}_{2}$/TiN gate stacks.