부산대학교 도서관

Fully integrated power converters offer many attractive features, e.g. small board form factors, fast response and flexible DVFS support to integrated microprocessors. While fully integrated switched capacitor (SWCAP) converters have been popularly developed in recent years, fully integrated buck converters are less demonstrated partially due to the challenges of on-chip inductors despite that buck converters offer more flexible output voltage range and potentially higher power densities. Previously, a fully integrated 3-level buck converter was proposed achieving 77% and 72% efficiency [1, 2]. Intel implemented a special on-chip solenoid magnetic core enabling low losses and high current density with 80%-to-84% efficiency [3]. A buck converter was built with a fixed 2GHz resonant tank with 73% peak efficiency [4]. A 4-level converter was developed at input voltages up to 4.5V by stacking transistors with 78% efficiency [5]. A switched-inductor-capacitor hybrid converter was developed with 78% efficiency through inductor current reduction [6]. However, prior works has either suffered from lower efficiency, lower power density or require a special magnetic core. As in Fig. 1, to overcome the challenges of fully-integrated buck converters, e.g. expensive inductors, high gate switching losses, etc., this work presents a comprehensive solution with contributions as follows. First, to reduce inductor area and loss, the proposed buck converter operates at up to 1.2GHz rendering $2 \sim5\mathrm{X}$ reduction of area compared with lower switching frequency at $100 \sim500$ MHz in prior works [2, 3, 5]. Stacked inductor with capacitors were also utilized to further reduce area of the converter by 40%. Second, to cope with the increased gate drive power at very high frequency, resonant gate drive technique is developed rendering up to 2.9% efficiency improvement. Third, a resonant tracking technique is utilized to automatically reach the optimal resonant operating point reducing the sensitivity of resonant control. Fourth, for a wide input range from 1.2V to 2.2V, stacked power transistors and AC coupling gate drive are used engaging only core transistors on an IO input voltage without overstressing and power-hungry level shifting, rendering $\sim3$% efficiency improvement over the use of thick-oxide transistors. As shown in Fig. 1, compared with existing fully integrated buck converters, a state-of-the-art power density and efficiency has been achieved from this work.