학술논문

A Near-Threshold Ring-Oscillator-Based ILCM with Edge-Selective Error Detector Achieving -64 dBc Reference-Spur and -239 dB FoM
Document Type
Conference
Source
ESSCIRC 2023- IEEE 49th European Solid State Circuits Conference (ESSCIRC) Solid State Circuits Conference (ESSCIRC), ESSCIRC 2023- IEEE 49th European. :273-276 Sep, 2023
Subject
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Computing and Processing
Photonics and Electrooptics
Signal Processing and Analysis
Phase noise
Low voltage
Prototypes
Detectors
Jitter
CMOS process
Delays
Injection-locked clock multiplier (ILCM)
nearthreshold operation
spur reduction
error-tracking technique
Language
ISSN
2643-1319
Abstract
A near-threshold ring-oscillator (RO)-based injection-locked clock multiplier (ILCM) with a novel error detection scheme is presented. The proposed ILCM employs a robust calibrator with reduced delay range and low-frequency operation, effectively suppressing the phase noise of the RO despite low-voltage operation. This leads to exceptional jitter performance while occupying a minimal area. Moreover, by eliminating the pulse distortion impact from the frequency detector, precise frequency tracking is achieved and deterministic jitter is effectively suppressed. The prototype ILCM is fabricated in a 28nm CMOS process with an active area of $0.0097\mathrm{m}\mathrm{m}^{2}.$ It generates output clocks of lGHz and 300MHz, operating at supply voltages of 0.5 V and 0.4V, respectively. The integrated jitter is $2.50\mathrm{p}\mathrm{s}_{\mathrm{R}\mathrm{M}\mathrm{S}}$ and $10.7\mathrm{p}\mathrm{s}_{\mathrm{R}\mathrm{M}\mathrm{S}}$ for each voltage, and the reference spur is recorded at -64.0dBc and -64.5dBc, while achieving an FoM of -239dB and -232dB.