학술논문

A Versatile and Efficient Neuromorphic Platform for Compute-in-Memory with Selector-less Memristive Crossbars
Document Type
Conference
Source
2023 IEEE International Symposium on Circuits and Systems (ISCAS) Circuits and Systems (ISCAS), 2023 IEEE International Symposium on. :1-4 May, 2023
Subject
Components, Circuits, Devices and Systems
Power, Energy and Industry Applications
Signal Processing and Analysis
Nonvolatile memory
Instruments
Memristors
Energy measurement
Switches
Programming
Energy efficiency
Neuromorphic computing
memristors
voltage-sensing
matrix-vector-multiplication
incremental outer-product-learning
Language
ISSN
2158-1525
Abstract
Memristive crossbar arrays have become essential building blocks in the realization of large-scale neuromorphic systems with high-density synaptic connectivity. Traditionally, memristor-based accelerators are equipped with selector elements to reduce cross-talk through sneak paths along unselected lines. However, due to the large drive strength required for selector elements, it comes at the cost of synaptic crossbar density. Selector- less alternatives require careful design of crossbar peripheral circuits to mitigate or eliminate sneak path-induced cross-talk. We propose a hybrid integrated platform that interfaces a selector- less memristor crossbar array with peripheral row and column instrumentation for array-parallel programming and readout for AI learning and inference applications. The proposed switched-capacitor voltage-sensing instrumentation avoids the need for current-sensing schemes with voltage-clamped sense lines that are typically used to mitigate the sneak path issues in selector- less crossbars but are substantially less energy-efficient than voltage-sensing. Our board-level platform is implemented using commercial off-the-shelf (COTS) data converters and switched capacitors, and is controlled by a Xilinx Spartan-6 FPGA. The system offers programmable sense times to characterize memristors over a wide range of resistances and the capability to switch between a transient-domain measurement and steady-state measurement to offer the desired trade-off between accuracy and energy efficiency during inference parallel readout. We implement a differential weight-encoding scheme to improve the accuracy of matrix-vector multiplication. The system also supports an array-level programming scheme for parallel write access as well as online learning-in-memory for neuromorphic applications through outer-product incremental decomposition of the weight matrix. Thus, our system offers a generic, user-configurable, and versatile platform to support wide dynamic range measurements of synaptic crossbar arrays and cognitive neuromorphic computing with emerging non-volatile memory devices.