학술논문

Role of FBEOL Al pads and hard dielectric for improved mechanical performance in lead-free C4 products
Document Type
Conference
Source
2013 IEEE 63rd Electronic Components and Technology Conference Electronic Components and Technology Conference (ECTC), 2013 IEEE 63rd. :2208-2213 May, 2013
Subject
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Fields, Waves and Electromagnetics
Aluminum
Dielectrics
Thermal stresses
Tensile stress
Load modeling
Semiconductor device modeling
Language
ISSN
0569-5503
2377-5726
Abstract
One of the major reliability concerns of current and next generation integrated circuits is mechanical failure due to stresses induced by the chip-package interactions (CPI). The packaged parts are subjected to thermal-mechanical stresses due to a mismatch of the coefficient of thermal expansion of the Si, lead-free C4 bumps, and the organic flip-chip substrate leading to mechanical delamination or cracking in the weaker low-k/ultra-low K films within the chip. This work discusses the role of Aluminum (Al) pads in the far-back-end-of-line (FBEOL) levels of the chip in CPI stress mitigation of the weak low-k and ultra-low k (ULK) BEOL levels. The affect of the Al pad thickness, size and shape on the CPI stresses have been studied by means of 3D mechanical finite element analysis. “White C4” bump data showing the benefits of increasing the thickness of the Al pads and growing the Al pad size to be larger than the under bump metallurgy (UBM) diameter in alleviating detrimental stresses from the weak BEOL levels is also been discussed in the paper. This paper also outlines through mechanical modeling and “white C4” bump data the reduction in CPI stresses in the weaker BEOL levels with increasing thickness of the FBEOL hard dielectric.