학술논문

Reusability is FIRRTL ground: Hardware construction languages, compiler frameworks, and transformations
Document Type
Conference
Source
2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Computer-Aided Design (ICCAD), 2017 IEEE/ACM International Conference on. :209-216 Nov, 2017
Subject
Components, Circuits, Devices and Systems
Hardware
Libraries
Hardware design languages
Field programmable gate arrays
Tools
Open source software
RTL
Design
FPGA
ASIC
Modeling
Reusability
Hardware Design Language
Hardware Construction Language
Intermediate Representation
Compiler
Transformations
Chisel
FIRRTL
Language
ISSN
1558-2434
Abstract
Enabled by modern languages and retargetable compilers, software development is in a virtual “Cambrian explosion” driven by a critical mass of powerfully parameterized libraries; but hardware development practices lag far behind. We hypothesize that existing hardware construction languages (HCLs) and novel hardware compiler frameworks (HCFs) can put hardware development on a similar evolutionary path by enabling new hardware libraries to be independent of underlying process technologies including FPGA mappings. We support this claim by (1) evaluating the degree with which Chisel, an existing HCL, can support powerfully parameterized libraries, and (2) introducing the concept and implementation of an HCF that uses an open-source hardware intermediate representation, FIRRTL (Flexible Intermediate Representation for RTL), to transform target-independent RTL into technology-specific RTL. Finally, we evaluate many hardware compiler transformations, including simplifying transformations, analyses, optimizations, instrumentations, and specializations, which demonstrate the power of a combined HCL and HCF approach.