부산대학교 도서관

The current feed capability of typical flip chip electrical interconnects is constrained by the solder alloy, as it is more susceptible to electromigration than the copper used for the pads and wires. Hence, interconnects formed by copper only mitigate the electromigration risk and/or allow to increase the current limit of the all-copper interconnect. In this work, two methods to form all-copper flip chip interconnects at an annealing temperature of 250 °C are presented. The interconnects in the contact region between Cu pillars and Cu pads with a pitch down to 150 µm are formed by Cu nanoparticle self-assembly and sintering. In the first method, the entire gap between a Cu pillar chip and a substrate was filled with a Cu nano-suspension. The formation of capillary bridges during the evaporation of the dispersant directed the self-assembly of the nanoparticles towards the contact region between Cu pillars and Cu pad. In the second method, the Cu pillar chip was dipped into a film of the Cu nano-suspension, followed by a transfer, placement and release with a die bonder onto pads on a substrate. The annealing of the Cu nanoparticles is performed in both cases in a reducing formic acid atmosphere. The first method was more susceptible to the formation of shorts between pillars, whereas the second method resulted in electrical functional chip to substrate assemblies. Interconnects with a mean electrical resistance of 26 ± 3 mΩ and a shear strength ranging from 4.6 to 12.3 MPa were achieved. The sintered Cu nanoparticles bridged gaps up to 10 µm between copper pillars and pads, demonstrating the potential to apply the joint also on non-planar substrates. Nevertheless, imperfections such as voids and cracks are still present in the joints and need further process development, to improve the quality and process robustness further.