학술논문

Accurate and fast electrostatic simulation of double gate FETs using deep neural network
Document Type
Conference
Source
2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM) Electron Devices Technology & Manufacturing Conference (EDTM), 2024 8th IEEE. :1-3 Mar, 2024
Subject
Bioengineering
Components, Circuits, Devices and Systems
Computing and Processing
Engineered Materials, Dielectrics and Plasmas
Engineering Profession
Fields, Waves and Electromagnetics
General Topics for Engineers
Photonics and Electrooptics
Industries
Poisson equations
Computational modeling
Artificial neural networks
Logic gates
Mathematical models
Microelectronics
Neural network
Double gate FET
Schrödinger-Poisson solver
Language
Abstract
Modeling and simulations have played a critical role in the progress of the microelectronics industry. With the scaling and advancements in the transistor architecture, it is necessary to incorporate higher-order effects to correctly model the behavior of the transistor. This increases the simulation time and computational load. In this work, we explore the use of deep neural networks to simulate the electrostatics of a double gate FET across a wide range of channel thicknesses.