학술논문

A Hybrid Memristor/CMOS SNN for Implementing One-Shot Winner-Takes-All Training
Document Type
Conference
Source
2022 IEEE International Symposium on Circuits and Systems (ISCAS) Circuits and Systems (ISCAS), 2022 IEEE International Symposium on. :210-214 May, 2022
Subject
Components, Circuits, Devices and Systems
Power, Energy and Industry Applications
Robotics and Control Systems
Signal Processing and Analysis
Training
Attenuators
Neurons
Memristors
Random access memory
Switches
CMOS technology
hybrid memristor/CMOS
CMOS current-attenuator
neuromorphic engineering
spiking neural networks
one-shot winner-takes-all
CMOS neuron circuit
Language
ISSN
2158-1525
Abstract
This paper presents a spiking neural network for pattern recognition. The network synapses are realized by resistive switching random access memory (ReRAM) cells, which are a stack of Au/Ti/C/Ti/HfO 2 /Pt. These cells are connected to an array of NMOS transistors (fabricated in a CMOS 180nm technology) to form a 4by4 1T1R crossbar between pre and postsynaptic circuitries. The pre-synaptic part contains conditioning circuits to reshape the inputs before applying them to the memristive crossbar. The post-synaptic section includes current attenuators that allowed the memristor domain currents to be mapped to neuron domain currents, as well as physiologically realistic neuron circuits fabricated in a CMOS 180nm technology. As a demonstrator, the network is trained with one-shot winner-takes-all method to differentiate four input patterns in its inference mode.