부산대학교 도서관

We report a TSV-last, heterogeneous 3D integration process for millimeter wave solid state tiles for use in the demonstration of a W-band active electronically scanned array (AESA) radar system. Each phased array tile consists of a high speed SiGe BiCMOS beamformer chip, vertically integrated with an advanced, multi-metallization level glass substrate which includes an RF interposer and a patch antenna array. This paper will briefly describe the SiGe and glass circuit layers, along with the main components of the 3D integration processing and assembly. Electrical testing of the SiGe and glass chips was conducted at various points during the integration processing, including DC and RF measurements after the two chips were bonded together. Additionally, DC testing of TSV chains was completed along with thermal cycling. The results of this work indicated a successful initial prototype demonstration of 3D heterogeneous integrated phased array tiles, which can be used for a multi-tile subarray assembly and subsequent sensor system demonstration.