학술논문

A High-Speed Synchronous Rectifier With Improved Dead Time Compensation and Suitable for High-Voltage Applications
Document Type
Periodical
Source
IEEE Transactions on Power Electronics IEEE Trans. Power Electron. Power Electronics, IEEE Transactions on. 39(1):25-29 Jan, 2024
Subject
Power, Energy and Industry Applications
Aerospace
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Computing and Processing
Engineered Materials, Dielectrics and Plasmas
Fields, Waves and Electromagnetics
General Topics for Engineers
Nuclear Engineering
Signal Processing and Analysis
Transportation
Integrated circuits
High-voltage techniques
Rectifiers
Power supplies
Delays
Voltage
Propagation delay
Double clamp zero voltage switching (DCZVS) buck–boost converter
high-voltage blocking
synchronous rectifier (SR)
++%24V%5FDS%24<%2Ftex-math>+<%2Finline-formula>+<%2Fnamed-content>-sensing%22"> $V_DS$ -sensing
Language
ISSN
0885-8993
1941-0107
Abstract
V DS (drain–source voltage)-based synchronous rectifiers (SRs) are widely used due to their simplicity and low cost. However, there are still three obvious issues. 1) The premature turn-off caused by parasitic inductance under high frequency. 2) The turn-on propagation delay is typically tens of nanoseconds. 3) Commercial SRs usually have a limited V DS rating of about 200 V. To solve the above problems, a high-speed SR (including a customized SR IC and a peripheral circuit) is proposed. A high-speed comparator together with a slope detection circuit is proposed to reduce the turn-on delay, and the proposed fully integrated SR IC is implemented in a 1- μ m bipolar process with a die area of 1.47 × 1.98 mm 2 . The peripheral circuit contains the improved dead time compensation circuit, the self-driven high-voltage isolation circuit, and the power supply circuit for SR IC, and the component count is reduced by device reuse. In a 200-W Double clamp zero voltage switching (DCZVS) buck–boost converter prototype, the proposed SR can achieve a switching frequency of more than 700 kHz with minimal dead time, the turn-on propagation delay including peripheral circuits and SR IC is reduced to 8.1 ns, the isolated drain–source voltage is limited to within 10 V, and the peak efficiency is 93.6%.