학술논문
Conventional Tests for Approximate Scan Logic
Document Type
Periodical
Author
Source
IEEE Design & Test IEEE Des. Test Design & Test, IEEE. 41(3):5-13 Jun, 2024
Subject
Language
ISSN
2168-2356
2168-2364
2168-2364
Abstract
This article proposes an interesting method to test circuits in the presence of faults in the scan chains. The scan infrastructure is used together with multiple functional clock cycles to help screen functional faults.