학술논문

Throughput Improvements Via Logistics in Current Semiconductor Factories
Document Type
Conference
Source
2021 China Semiconductor Technology International Conference (CSTIC) Semiconductor Technology International Conference (CSTIC), 2021 China. :1-2 Mar, 2021
Subject
Bioengineering
Components, Circuits, Devices and Systems
Computing and Processing
Engineered Materials, Dielectrics and Plasmas
Photonics and Electrooptics
Power, Energy and Industry Applications
Signal Processing and Analysis
Fabrication
Materials handling
Throughput
Production facilities
Standards
Logistics
Language
Abstract
Production cycle times (throughput rates) are a primary aspect of semiconductor manufacturing efficiency. The cycle time's dependence on the logistics of manufacturing is overwhelming. Process variability excludes “just in time” WIP delivery. And not able to deal with the inherent variability of fabrication processes, the manufacturing logistics compensates by stuffing the fab full of waiting WIP. The results are long cycle times and retarded throughput. Research indicates improvements in cycle times through the importing of hybrid logistics infrastructures into existing material handling systems. The method is demonstrated, via dynamic high-resolution simulation, by comparing full 300 mm fabs having standard or hybrid logistics. Cycle time and throughput gains are realized via the import of hybrid infrastructures.