학술논문

Study of wafer warpage for Fan-Out wafer level packaging: finite element modelling and experimental validation
Document Type
Conference
Source
2019 20th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE) Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE), 2019 20th International Conference on. :1-7 Mar, 2019
Subject
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Temperature measurement
Strain
Young's modulus
Liquids
Temperature distribution
Heating systems
fan-out wafer level packaging
warpage
finite element analysis
stereo-digital image correlation
nanoindentation
Language
Abstract
Wafer warpage is a big challenge during wafer process in Fan-Out Wafer-Level-Packaging (FOWLP). It is crucial to keep warpage low as much as possible for successful process integration. The warpage is mainly due to the Coefficient of Thermal Expansion (CTE) mismatch between the involved materials during temperature changes. Furthermore, warpage of molded wafers depends on material properties. Therefore, accurate material characterization has great importance. In this paper, thermal-mechanical properties of the used polymeric materials were measured using nanoindentation and Stereo-Digital Image Correlation (SDIC). In this study, warpage of molded wafers with and without Temporary Bonding Adhesive (TBA) is investigated during heating to 200°C and cooling down to room temperature. SDIC technique was used to measure the warpage of molded wafers. Finally, Finite Element (FE) simulations were carried out using as input the measured thermal-mechanical properties. A comparison between warpage measurements and FE simulation at different temperatures showed a good agreement.