부산대학교 도서관

The paper presents project and its verification of a prototype integrated circuit containing an analog, programmable finite impulse response (FIR) filter, implemented in CMOS 350 nm technology. The structure of the filter is based on the switched capacitor technique. In circuits of this type, one of main challenges is an efficient implementation of filter coefficients, which result from several factors described in this work. When implementing such filters as programmable circuits, the values of their coefficients have to be limited to a selected range, i.e. a given resolution in bits. In the implemented prototype filter, the filter coefficients are represented by 6 bits in sign-magnitude notation, so they can take 63 different values only. In such filters, it is not possible to directly implement any frequency response of the filter. Each time, it is necessary to properly round the theoretical values of the coefficients so that they fit into the available range of discrete values resulting from the implementation. The authors of the work designed an algorithm that allows such matching. The paper also presents results of measurements of the prototype chip.