학술논문
Manufacturable triple level metal technology for submicron CMOS
Document Type
Conference
Author
Source
Seventh International IEEE Conference on VLSI Multilevel Interconnection VLSI Multilevel Interconnection Conference, 1990. Proceedings., Seventh International IEEE. :407-409 1990
Subject
Language
Abstract
The triple-level-metal (TLM) module of a submicron CMOS technology with (titanium) salicided devices is discussed. The key technology features of the module include the use of conformal BPSG for enhanced planarization, a TiN barrier layer under M1, plasma-dry-tapered contacts and vias, and TiN antireflection coatings for metal patterning. Large-area test structures for each TLM component were used to develop and evaluate the processes. Electrical measurements and physical analysis are presented for these components.ETX